VHDL is a hardware description language(HDL). An HDL looks a bit like a programming language but has a different purpose. Rather than being used to design software, and HDL is used to define a computer chip. VHDL can be used to describe any type of circuitry and is frequently used in the design, simulation, and testing of processors, CPUs, motherboards, FPGAs, ASICs, and many other types of digital circuitry.

• The Basic VHDL Course covers the most important features of the VHDL language.

• This VHDL course will help you understand the fundamental principles of the language.

No hardware is required, meaning you can start right away! The VHDL exercises are run only in a VHDL simulator.

As a student, you can install the student edition of ModelSim for free. ModelSim is the most common VHDL simulator, and therefore the one you are most likely to encounter in your first job.

• Being familiar with the industry standard of simulators is advantageous. You can put that on your resume to make it more relevant.